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mono-jit-v2
second attempt at single layer address tables (first attempt https://git.ryujinx.app/projects/Ryubing/pulls/167). should work with all games now. Co-authored-by: LotP1 <68976644+LotP1@users.noreply.github.com>
This commit is contained in:
committed by
KeatonTheBot
co-authored by
LotP1
parent
4b255a98db
commit
521a18f5a7
@@ -12,7 +12,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
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CpuPreset cpuPreset,
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IMemoryManager memoryManager,
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ulong address,
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AddressTable<ulong> funcTable,
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IAddressTable<ulong> funcTable,
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nint dispatchStubPtr,
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Architecture targetArch)
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{
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@@ -18,7 +18,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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public readonly CodeWriter Writer;
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public readonly RegisterAllocator RegisterAllocator;
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public readonly TailMerger TailMerger;
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public readonly AddressTable<ulong> FuncTable;
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public readonly IAddressTable<ulong> FuncTable;
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public readonly nint DispatchStubPointer;
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private readonly MultiBlock _multiBlock;
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@@ -31,7 +31,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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TailMerger tailMerger,
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RegisterSaveRestore registerSaveRestore,
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MultiBlock multiBlock,
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AddressTable<ulong> funcTable,
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IAddressTable<ulong> funcTable,
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nint dispatchStubPointer,
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nint pageTablePointer)
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{
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@@ -303,7 +303,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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}
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}
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public static CompiledFunction Compile(CpuPreset cpuPreset, IMemoryManager memoryManager, ulong address, AddressTable<ulong> funcTable, nint dispatchStubPtr)
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public static CompiledFunction Compile(CpuPreset cpuPreset, IMemoryManager memoryManager, ulong address, IAddressTable<ulong> funcTable, nint dispatchStubPtr)
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{
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MultiBlock multiBlock = Decoder.DecodeMulti(cpuPreset, memoryManager, address);
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@@ -3,6 +3,7 @@ using Ryujinx.Cpu.LightningJit.CodeGen;
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using Ryujinx.Cpu.LightningJit.CodeGen.Arm64;
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using System;
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using System.Diagnostics;
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using System.Linq;
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using System.Numerics;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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@@ -214,7 +215,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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RegisterAllocator regAlloc,
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TailMerger tailMerger,
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Action writeEpilogue,
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AddressTable<ulong> funcTable,
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IAddressTable<ulong> funcTable,
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nint dispatchStubPtr,
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InstName name,
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ulong pc,
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@@ -297,7 +298,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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RegisterAllocator regAlloc,
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TailMerger tailMerger,
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Action writeEpilogue,
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AddressTable<ulong> funcTable,
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IAddressTable<ulong> funcTable,
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nint funcPtr,
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int spillBaseOffset,
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ulong pc,
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@@ -308,7 +309,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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int tempGuestAddress = -1;
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bool inlineLookup = guestAddress.Kind != OperandKind.Constant &&
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funcTable is { Sparse: true };
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funcTable.TableType == AddressTableType.Sparse;
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if (guestAddress.Kind == OperandKind.Constant)
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{
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@@ -354,7 +355,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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}
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else if (inlineLookup)
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{
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// Inline table lookup. Only enabled when the sparse function table is enabled with 2 levels.
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// Inline table lookup. Only enabled when the sparse function table is enabled with 1 level.
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Operand indexReg = Register(NextFreeRegister(tempRegister + 1, tempGuestAddress));
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@@ -368,18 +369,15 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
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// Index into the table.
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asm.Mov(rn, tableBase);
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for (int i = 0; i < funcTable.Levels.Length; i++)
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{
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AddressTableLevel level = funcTable.Levels[i];
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asm.Ubfx(indexReg, guestAddress, level.Index, level.Length);
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asm.Lsl(indexReg, indexReg, Const(3));
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AddressTableLevel level = funcTable.Levels.Last();
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asm.Ubfx(indexReg, guestAddress, level.Index, level.Length);
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asm.Lsl(indexReg, indexReg, Const(3));
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// Index into the page.
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asm.Add(rn, rn, indexReg);
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// Index into the page.
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asm.Add(rn, rn, indexReg);
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// Load the page address.
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asm.LdrRiUn(rn, rn, 0);
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}
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// Load the page address.
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asm.LdrRiUn(rn, rn, 0);
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if (tempGuestAddress != -1)
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{
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