Superredstone/Kenji-NX
1
0
Fork 0
mirror of https://git.ryujinx.app/projects/Kenji-NX.git synced 2026-10-04 13:28:56 +02:00
Code Issues Packages Projects Releases Wiki Activity

misc: chore: Use explicit types & fix object creation

Browse Source
This commit is contained in:
KeatonTheBot
2026-08-12 13:57:33 -05:00
parent 69c088004a
commit 88cef7e853
461 changed files with 3163 additions and 3082 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/ARMeilleure/Instructions/InstEmitAlu32.cs
+2 -2
View File
@@ -415,7 +415,7 @@ namespace ARMeilleure.Instructions
{
IOpCode32AluBf op = (IOpCode32AluBf)context.CurrOp;
var msb = op.Lsb + op.Msb; // For this instruction, the msb is actually a width.
int msb = op.Lsb + op.Msb; // For this instruction, the msb is actually a width.
Operand n = GetIntA32(context, op.Rn);
Operand res = context.ShiftRightSI(context.ShiftLeft(n, Const(31 - msb)), Const(31 - op.Msb));
@@ -547,7 +547,7 @@ namespace ARMeilleure.Instructions
{
IOpCode32AluBf op = (IOpCode32AluBf)context.CurrOp;
var msb = op.Lsb + op.Msb; // For this instruction, the msb is actually a width.
int msb = op.Lsb + op.Msb; // For this instruction, the msb is actually a width.
Operand n = GetIntA32(context, op.Rn);
Operand res = context.ShiftRightUI(context.ShiftLeft(n, Const(31 - msb)), Const(31 - op.Msb));
src/ARMeilleure/Instructions/InstEmitFlowHelper.cs
+3 -2
View File
@@ -1,4 +1,5 @@
using ARMeilleure.CodeGen.Linking;
using ARMeilleure.Common;
using ARMeilleure.Decoders;
using ARMeilleure.IntermediateRepresentation;
using ARMeilleure.State;
@@ -205,7 +206,7 @@ namespace ARMeilleure.Instructions
Operand hostAddress;
var table = context.FunctionTable;
IAddressTable<ulong> table = context.FunctionTable;
// If address is mapped onto the function table, we can skip the table walk. Otherwise we fallback
// onto the dispatch stub.
@@ -230,7 +231,7 @@ namespace ARMeilleure.Instructions
for (int i = 0; i < table.Levels.Length; i++)
{
var level = table.Levels[i];
AddressTableLevel level = table.Levels[i];
int clearBits = 64 - (level.Index + level.Length);
Operand index = context.ShiftLeft(
src/ARMeilleure/Instructions/InstEmitMemoryEx32.cs
+2 -2
View File
@@ -143,8 +143,8 @@ namespace ARMeilleure.Instructions
Operand address = context.Copy(GetIntA32(context, op.Rn));
var exclusive = (accType & AccessType.Exclusive) != 0;
var ordered = (accType & AccessType.Ordered) != 0;
bool exclusive = (accType & AccessType.Exclusive) != 0;
bool ordered = (accType & AccessType.Ordered) != 0;
if ((accType & AccessType.Load) != 0)
{
src/ARMeilleure/Instructions/InstEmitSimdCmp32.cs
+1 -1
View File
@@ -229,7 +229,7 @@ namespace ARMeilleure.Instructions
private static Operand ZerosOrOnes(ArmEmitterContext context, Operand fromBool, OperandType baseType)
{
var ones = (baseType == OperandType.I64) ? Const(-1L) : Const(-1);
Operand ones = (baseType == OperandType.I64) ? Const(-1L) : Const(-1);
return context.ConditionalSelect(fromBool, ones, Const(baseType, 0L));
}
src/ARMeilleure/Instructions/InstEmitSimdCvt32.cs
+4 -4
View File
@@ -118,15 +118,15 @@ namespace ARMeilleure.Instructions
{
OpCode32SimdCvtFFixed op = (OpCode32SimdCvtFFixed)context.CurrOp;
var toFixed = op.Opc == 1;
bool toFixed = op.Opc == 1;
int fracBits = op.Fbits;
var unsigned = op.U;
bool unsigned = op.U;
if (toFixed) // F32 to S32 or U32 (fixed)
{
EmitVectorUnaryOpF32(context, (op1) =>
{
var scaledValue = context.Multiply(op1, ConstF(MathF.Pow(2f, fracBits)));
Operand scaledValue = context.Multiply(op1, ConstF(MathF.Pow(2f, fracBits)));
MethodInfo info = unsigned ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU32)) : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS32));
return context.Call(info, scaledValue);
@@ -136,7 +136,7 @@ namespace ARMeilleure.Instructions
{
EmitVectorUnaryOpI32(context, (op1) =>
{
var floatValue = unsigned ? context.ConvertToFPUI(OperandType.FP32, op1) : context.ConvertToFP(OperandType.FP32, op1);
Operand floatValue = unsigned ? context.ConvertToFPUI(OperandType.FP32, op1) : context.ConvertToFP(OperandType.FP32, op1);
return context.Multiply(floatValue, ConstF(1f / MathF.Pow(2f, fracBits)));
}, !unsigned);
src/ARMeilleure/Instructions/InstEmitSimdMemory32.cs
+1 -1
View File
@@ -87,7 +87,7 @@ namespace ARMeilleure.Instructions
{
if (op.Replicate)
{
var regs = (count > 1) ? 1 : op.Increment;
int regs = (count > 1) ? 1 : op.Increment;
for (int reg = 0; reg < regs; reg++)
{
int dreg = reg + d;
src/ARMeilleure/Instructions/SoftFloat.cs
+2 -2
View File
@@ -1686,7 +1686,7 @@ namespace ARMeilleure.Instructions
}
else if (MathF.Abs(value) < MathF.Pow(2f, -128))
{
var overflowToInf = fpcr.GetRoundingMode() switch
bool overflowToInf = fpcr.GetRoundingMode() switch
{
FPRoundingMode.ToNearest => true,
FPRoundingMode.TowardsPlusInfinity => !sign,
@@ -3393,7 +3393,7 @@ namespace ARMeilleure.Instructions
}
else if (Math.Abs(value) < Math.Pow(2d, -1024))
{
var overflowToInf = fpcr.GetRoundingMode() switch
bool overflowToInf = fpcr.GetRoundingMode() switch
{
FPRoundingMode.ToNearest => true,
FPRoundingMode.TowardsPlusInfinity => !sign,