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misc: chore: Fix object creation

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This commit is contained in:
KeatonTheBot
2025-09-25 17:04:07 -05:00
parent 0928851966
commit 9cdd9f6dbf
48 changed files with 315 additions and 316 deletions
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src/Ryujinx.Cpu/AddressSpace.cs
+1 -1
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@@ -56,7 +56,7 @@ namespace Ryujinx.Cpu
{
try
{
MemoryBlock baseMemory = new MemoryBlock(addressSpaceSize, AsFlags);
MemoryBlock baseMemory = new(addressSpaceSize, AsFlags);
addressSpace = baseMemory;
break;
src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/Assembler.cs
+2 -2
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@@ -857,7 +857,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void PrfmI(Operand rn, int imm, uint type, uint target, uint policy)
{
Operand rt = new Operand((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
Operand rt = new((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
WriteInstruction(0xf9800000u | (EncodeUImm12(imm, 3) << 10), rt, rn);
}
@@ -868,7 +868,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void Prfum(Operand rn, int imm, uint type, uint target, uint policy)
{
Operand rt = new Operand((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
Operand rt = new((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
WriteInstruction(0xf8800000u | (EncodeSImm9(imm) << 12), rt, rn);
}
src/Ryujinx.Cpu/Nce/NcePatcher.cs
+6 -6
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@@ -471,8 +471,8 @@ namespace Ryujinx.Cpu.Nce
private static void WriteInManagedLockAcquire(Assembler asm, Operand ctx, Operand tmp, Operand tmp2)
{
Operand tmpUint = new Operand(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new Operand(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmpUint = new(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand lblLoop = asm.CreateLabel();
@@ -499,8 +499,8 @@ namespace Ryujinx.Cpu.Nce
private static void WriteInManagedLockRelease(Assembler asm, Operand ctx, Operand tmp, Operand tmp2, ThreadExitMethod exitMethod, Operand lblQuit = default)
{
Operand tmpUint = new Operand(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new Operand(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmpUint = new(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand lblLoop = asm.CreateLabel();
Operand lblInterrupt = asm.CreateLabel();
@@ -562,8 +562,8 @@ namespace Ryujinx.Cpu.Nce
private static void WriteInManagedLockReleaseForSuspendHandler(Assembler asm, Operand ctx, Operand tmp, Operand tmp2, Operand lblAgain)
{
Operand tmpUint = new Operand(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new Operand(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmpUint = new(tmp.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand tmp2Uint = new(tmp2.GetRegister().Index, RegisterType.Integer, OperandType.I32);
Operand lblLoop = asm.CreateLabel();
Operand lblInterrupt = asm.CreateLabel();
src/Ryujinx.Cpu/Signal/UnixSignalHandlerRegistration.cs
+2 -2
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@@ -123,7 +123,7 @@ namespace Ryujinx.Cpu.Signal
}
else
{
SigAction sig = new SigAction
SigAction sig = new()
{
sa_handler = action,
sa_flags = SA_SIGINFO,
@@ -238,7 +238,7 @@ namespace Ryujinx.Cpu.Signal
{
if (PlatformInfo.IsBionic)
{
SigActionBionic tmp = new SigActionBionic
SigActionBionic tmp = new()
{
sa_handler = oldAction.sa_handler,
sa_mask = oldAction.sa_mask,