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misc: chore: Fix numerous NullReferenceExceptions, InvalidOperationExceptions

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This commit is contained in:
KeatonTheBot
2025-06-18 02:25:06 -05:00
parent a90db3464d
commit d2a532f971
90 changed files with 667 additions and 533 deletions
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src/Ryujinx.Cpu/AddressTable.cs
+15 -12
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@@ -258,23 +258,26 @@ namespace ARMeilleure.Common
for (int i = 0; i < Levels.Length - 1; i++)
{
ref AddressTableLevel level = ref Levels[i];
ref TEntry* nextPage = ref page[level.GetValue(address)];
if (nextPage == null || nextPage == _fillBottomLevelPtr)
if (page != null)
{
ref AddressTableLevel nextLevel = ref Levels[i + 1];
ref TEntry* nextPage = ref page[level.GetValue(address)];
if (i == Levels.Length - 2)
if (nextPage == null || nextPage == _fillBottomLevelPtr)
{
nextPage = (TEntry*)Allocate(1 << nextLevel.Length, Fill, leaf: true);
}
else
{
nextPage = (TEntry*)Allocate(1 << nextLevel.Length, GetFillValue(i), leaf: false);
ref AddressTableLevel nextLevel = ref Levels[i + 1];
if (i == Levels.Length - 2)
{
nextPage = (TEntry*)Allocate(1 << nextLevel.Length, Fill, leaf: true);
}
else
{
nextPage = (TEntry*)Allocate(1 << nextLevel.Length, GetFillValue(i), leaf: false);
}
}
page = (TEntry**)nextPage;
}
page = (TEntry**)nextPage;
}
return (TEntry*)page;
src/Ryujinx.Cpu/Jit/HostTracked/AddressSpacePartition.cs
+6 -1
View File
@@ -388,7 +388,12 @@ namespace Ryujinx.Cpu.Jit.HostTracked
_treeLock.ExitReadLock();
}
return (_backingMemory, _firstPagePa.Value);
if (_firstPagePa != null)
{
return (_backingMemory, _firstPagePa.Value);
}
return (null, 0);
}
public PrivateRange GetPrivateAllocation(ulong va)
src/Ryujinx.Cpu/Jit/MemoryManagerHostTracked.cs
+6 -1
View File
@@ -135,7 +135,10 @@ namespace Ryujinx.Cpu.Jit
offset += (int)copySize;
}
return new ReadOnlySequence<byte>(first, 0, last, (int)(size - last.RunningIndex));
if (last != null)
{
return new ReadOnlySequence<byte>(first, 0, last, (int)(size - last.RunningIndex));
}
}
catch (InvalidMemoryRegionException)
{
@@ -146,6 +149,8 @@ namespace Ryujinx.Cpu.Jit
return ReadOnlySequence<byte>.Empty;
}
return default;
}
/// <inheritdoc/>
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs
+1 -1
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@@ -872,7 +872,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
if (unscaled)
{
writeInstUnscaled(rt, tempRegister.Operand, offs);
writeInstUnscaled?.Invoke(rt, tempRegister.Operand, offs);
}
else
{